SOLICITATION NOTICE
A -- Chip-to-Chip Optical Interconnects (C2OI)
- Notice Date
- 9/19/2002
- Notice Type
- Solicitation Notice
- Contracting Office
- Other Defense Agencies, Defense Advanced Research Projects Agency, Contracts Management Office, 3701 North Fairfax Drive, Arlington, VA, 22203-1714
- ZIP Code
- 22203-1714
- Solicitation Number
- BAA02-23
- Point of Contact
- Ravindra Athale, DARPA Program Manager, Phone 000-000-0000, Fax 703-696-2206,
- E-Mail Address
-
none
- Description
- Defense Advanced Research Projects Agency (DARPA), Contracts Management Office (CMO), 3701 North Fairfax Drive, Arlington, VA 22203-1714. A-CHIP-TO-CHIP OPTICAL INTERCONNECTS (C2OI), SOL BAA 02-23, DUE 121602, POC RAVI ATHALE, PH.D., DARPA/MTO, FAX (703) 696-2237 PROGRAM OBJECTIVES AND DESCRIPTION The Defense Advanced Research Projects Agency (DARPA) is soliciting research proposals in the area of optical interconnects between chips. Proposed research should investigate innovative approaches that enable revolutionary advances in science, devices or systems. Specifically excluded is research which primarily results in evolutionary improvement to the existing state of practice. The technical objective of the Chip-to-Chip Optical Interconnects (C2OI) Program is to overcome the current chip-to-chip electrical interconnect bottleneck by developing and implementing innovative optical solutions. The quantitative performance goal of this program for the chip-to-chip optical links is specified in terms of data rate (10 Gigabits per second or higher), channel density (16 channels/mm or higher), power dissipation (approximately 50 mW/channel), length (1 meter), signal integrity (bit error rate significantly below 10-12), and geometric form factor compatibility with existing systems (low net board profile, < 25 mm height). It is envisioned that in the future, many applications will require 5-10 terabits of net data throughput out of a single Multi-Chip Module (MCM) on a board. Therefore, it is essential that the optical solutions developed under this program are scalable in bandwidth and density beyond the numbers quoted above. Qualitative features of the chip-to-chip optical interconnect technology include layout flexibility (which would require sharp bends in optical channels within and out of plane) and process compatibility with mainstream electronic manufacturing. DARPA seeks innovative proposals in the following areas: I. Optical Transmitter Receiver Modules: The theoretical advantages of optical interconnects can only be realized if the electrical-to-optical and optical-to-electrical transduction is performed in a space and energy efficient manner. One of the principle areas of interest in this program corresponds to optical transmitter and receiver modules II. Optical Channels: Chip-to-chip optical interconnects presuppose means for moving optical signals from the transmitting chip to the receiving chip over distances up to one meter. The movement of optical signals, while static, should be free from any geometric constraints if the resulting system is to have the design and layout flexibility that current electric interconnects provide. Coupling mechanisms for interfacing the optical channels to optical transmitters and receivers are essential for the program. Passive optical coupling between optical channels on different boards and boards and backplanes is an area of research where significant innovation is needed to develop high performance, cost effective and manufacturable solutions. III. Integrated Technology Demonstration: The first two phases of this program are concentrated on technology development and laboratory system demonstration of chip-to-chip optical interconnects. The third phase will lead to an integrated demonstration of the technologies developed in the first two phases that are optimized for specific applications. The first part of the demonstration dealing with identification of insertion opportunities and quantification of system requirements will be performed in Phase II of the program. Additional information on these technology areas is provided in the Areas of Interest section of the BAA 02-23 Proposer Information Pamphlet referenced below. PROGRAM SCOPE The program will consist of three phases. Phase I (18 months) is focused on constituent technology demonstrations. The optical transmitter/receiver modules have an interim performance objective of minimum 4 channels with approximate data rate 10 Gbps and less than 100 mW/channel power consumption. The second constituent technology to be developed in Phase I will be optical channels (minimum 4 channels) at a minimum of 8 channels/mm density and approximately 30 cm path length with demonstrated layout flexibility and low profile. Coupling between the optical transmitter/receiver module and the optical channels is an essential milestone of Phase I. Exploration of different strategies for achieving desired bit error rate and different levels of synchronicity would also be performed in Phase I. The focus of Phase II (18 months) will be to explore different approaches of incorporating the optical transmitter/receiver modules with high speed, high-density electronic chips with significant system functionality (other than operations required by the optical link). This work combined with the outcomes of the Phase I will result in a final laboratory demonstration of chip-to-chip optical interconnection with the performance specifications listed above. Also performed in Phase II will be a study to identify most promising insertion opportunities and the preliminary design of a test bed for incorporating chip-to-chip optical interconnects. Those efforts that appear to have the greatest potential for production, insertion, transition or overall benefit to DoD will be selected for an optional Phase III (12 months) for conducting integrated technology demonstration. Awards totaling $35 M for Phase I and II efforts and $10 M for Phase III are expected to be made during the first half of calendar year 2003. Organizations wishing to participate in Phase II and Phase III should include them as options in their proposal (separate options for each phase). Multiple awards are anticipated. Collaborative efforts/teaming are strongly encouraged. The program will also support some very innovative individual investigator efforts. Cost sharing is not required and is not an evaluation criterion, but is encouraged where there is a reasonable probability of a potential commercial application related to the proposed research and development effort. Questions concerning this BAA may be directed to the technical POC for this effort, Dr. Ravindra Athale, phone: (703) 696-2237, fax: (703) 696-2206, electronic mail: rathale@darpa.mil. GENERAL INFORMATION Proposers must obtain a pamphlet entitled "BAA 02-23, Chip-to-Chip Optical Interconnects (C2OI), Proposer Information Pamphlet" which provides further information on chip-to-chip optical interconnects, the submission, evaluation, and funding processes, proposal abstract formats, proposal formats, and other general information. This pamphlet may be obtained from the FedBizOpps website: http://www.fedbizopps.gov/, World Wide Web (WWW) at URL http://www.darpa.mil/ or by fax, electronic mail, or mail request to the administrative contact address given below. Proposals not meeting the format described in the pamphlet may not be reviewed. In order to minimize unnecessary effort in proposal preparation and review, proposers are strongly encouraged to submit proposal abstracts in advance of full proposals. An original hard copy of the proposal abstract, 9 hard copies and an electronic copy of the proposal abstract (PDF (preferred), or MS-Word readable on a CD-ROM, a single 100 MB Iomega Zip (registered) disk, or a single 3.5 inch High Density MS-DOS formatted 1.44 Megabyte (MB) diskette) must be submitted to DARPA/MTO, 3701 North Fairfax Drive, Arlington, VA 22203-1714 (Attn.: BAA 02-23) on or before 4:00 p.m., local time, Thursday, October 24, 2002. Proposal abstracts received after this time and date may not be reviewed. Upon review, DARPA will provide written feedback on the likelihood of a full proposal being selected and the time and date for submission of a full proposal. Proposers not submitting proposal abstracts must submit an original hard copy of the full proposal, 9 hard copies and an electronic copy of the proposal (PDF (preferred), or MS-Word readable on a CD-ROM, a single 100 MB Iomega Zip (registered) disk, or a single 3.5 inch High Density MS-DOS formatted 1.44 Megabyte (MB) diskette). Each disk must be clearly labeled with BAA 02-23, proposer organization, proposal title (short title recommended). The full proposal (original and designated number of hard and electronic copies) must be submitted to DARPA/MTO, 3701 North Fairfax Drive, Arlington, VA 22203-1714 (Attn.: BAA 02-23) on or before 4:00 p.m., local time, Monday, December 16, 2002, in order to be considered during the initial round of selections; however, proposals received after this deadline may be received and evaluated up to one year from date of posting on FedBizOpps. Full proposals submitted after the due date specified in the BAA or due date otherwise specified by DARPA after review of proposal abstracts may be selected contingent upon the availability of funds. This notice, in conjunction with the BAA 02-23 Proposer Information Pamphlet, constitutes the total BAA. No additional information is available, nor will a formal RFP or other solicitation regarding this announcement be issued. Requests for the same will be disregarded. The Government reserves the right to select for award all, some, or none of the proposals received. All responsible sources capable of satisfying the Government's needs may submit a proposal which shall be considered by DARPA. Input on technical aspects of the proposals may be solicited by DARPA from non-Government consultants /experts who are bound by appropriate non-disclosure requirements. Non-Government technical consultants/experts will not have access to proposals that are labeled by their offerors as "Government Only". Historically Black Colleges and Universities (HBCUs) and Minority Institutions (MIs) are encouraged to submit proposals and join others in submitting proposals; however, no portion of this BAA will be set aside for HBCU and MI participation due to the impracticality of reserving discrete or severable areas of research in chip-to-chip optical interconnects. All administrative correspondence and questions on this solicitation, including requests for information on how to submit a proposal abstract or full proposal to this BAA, should be directed to one of the administrative addresses below; e-mail or fax is preferred. DARPA intends to use electronic mail and fax for correspondence regarding BAA 02-23. Proposals and proposal abstracts may not be submitted by fax or e-mail; any so sent will be disregarded. DARPA encourages use of the WWW for retrieving the Proposer Information Pamphlet and any other related information that may subsequently be provided. EVALUATION CRITERIA Evaluation of proposal abstracts and full proposals will be accomplished through a technical review of each proposal using the following criteria, which are listed in descending order of relative importance: (l) overall scientific and technical merit, (2) potential contribution and relevance to DARPA mission, (3) plans and capability to accomplish technology transition, (4) offeror's capabilities and related experience, and (5) cost realism. Note: cost realism will only be significant in proposals which have significantly under or over-estimated the cost to complete their effort. The administrative addresses for this BAA are: Fax: (703) 351-8616 (Addressed to: DARPA/MTO, BAA 02-23), Electronic Mail: BAA02-23@darpa.mil Mail: DARPA/MTO, ATTN: BAA 02-23 3701 North Fairfax Drive Arlington, VA 22203-1714 This announcement and the Proposer Information Pamphlet may be retrieved via the WWW at URL http://www.darpa.mil/ in the solicitations area.
- Record
- SN00171526-W 20020921/020919213927 (fbodaily.com)
- Source
-
FedBizOpps.gov Link to This Notice
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