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FBO DAILY ISSUE OF JUNE 11, 2010 FBO #3121
MODIFICATION

70 -- Computer hardware to run scientific software

Notice Date
6/9/2010
 
Notice Type
Modification/Amendment
 
NAICS
334111 — Electronic Computer Manufacturing
 
Contracting Office
Department of Commerce, National Institute of Standards and Technology (NIST), Acquisition Management Division, 100 Bureau Drive, Building 301, Room B129, Mail Stop 1640, Gaithersburg, Maryland, 20899-1640
 
ZIP Code
20899-1640
 
Solicitation Number
SB1341-10-RQ-0447
 
Archive Date
6/29/2010
 
Point of Contact
Divya Soni, Phone: 3019756394
 
E-Mail Address
divya.soni@nist.gov
(divya.soni@nist.gov)
 
Small Business Set-Aside
Total Small Business
 
Description
The purpose of this modification is to provide responses to the following questions posed by potential offerors: Question 1: The requirement for the(5)units states that each unit needs to have(8) quad core 64-bit CPU's. The industry does not have platform that can cater (8) CPU's. We can get something that can accept (4) CPU's. Please advise. Response 1: Our market research indicates that eight CPU systems are commercially available. Question 2: I noticed you were asking for 8x quad-core CPUs. I assume you are looking for the 8-way servers with Opteron 8000 series CPUs. However, there is newer technology out there that would perform better and is a lot more cost effective (CPUs would cost $1000 instad of $2000 each and we'd need half as many, plus they perform much better). We are interested in possibly proposing a 4-way 8-core system with 2.4GHz CPUs. While the CPU speed is 2.4GHz instead of 2.6GHz, benchmarks show that the new 2.4GHz CPUs perform faster than the older 2.6GHz CPUs. This is due to faster memory (DDR3 1333MHz instead of DDR2 at 800MHz) and bus speeds, as well as better CPU/Memory speeds. The space required is also a lot smaller (will fit in a 1U instead of a 5U). Would you be interested in something like this? Or should we stay with the 2.6GHz Shanghai system? Response 2: Yes, we are interested in newer technology systems. At the time our requirement was formulated, these systems were not available. The fundamental requirement is that the systems should have 32 cores which can access 128 GB of shared memory. We agree that the higher memory bus speed does compensate adequately for the slower processor clock speed. Provided a proposed system meets the per-system core count and shared memory capacity, it will be acceptable.
 
Web Link
FBO.gov Permalink
(https://www.fbo.gov/spg/DOC/NIST/AcAsD/SB1341-10-RQ-0447/listing.html)
 
Record
SN02172726-W 20100611/100609235206-9a8df9c0abc2a195d2dee3692a7d9d15 (fbodaily.com)
 
Source
FedBizOpps Link to This Notice
(may not be valid after Archive Date)

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