SOLICITATION NOTICE
59 -- FX130 AND ZYNQ CIRCUIT BOARDS
- Notice Date
- 9/3/2014
- Notice Type
- Combined Synopsis/Solicitation
- NAICS
- 334111
— Electronic Computer Manufacturing
- Contracting Office
- NASA/Glenn Research Center, 21000 Brookpark Road, Cleveland, OH 44135
- ZIP Code
- 44135
- Solicitation Number
- NNC14521994Q
- Response Due
- 9/15/2014
- Archive Date
- 9/3/2015
- Point of Contact
- Ingrid Pace, Buyer, Phone 216-433-2772, Fax 216-433-2480, Email Ingrid.Pace-1@nasa.gov - Dorothy E Viancourt, Purchasing, Phone 216-433-2532, Fax 216-433-5090, Email Dorothy.E.Viancourt@nasa.gov
- E-Mail Address
-
Ingrid Pace
(Ingrid.Pace-1@nasa.gov)
- Small Business Set-Aside
- Total Small Business
- Description
- This notice is a combined synopsis/solicitation for commercial items prepared in accordance with the format in FAR Subpart 12.6, as supplemented with additional information included in this notice. This announcement constitutes the only solicitation; offers are being requested and a written solicitation will not be issued. This notice is being issued as Request for Quotations (RFQ) for six (6) FX130 and three (3) Zynq circuit boards with the following specifications: Specifications for FX130 Field Programmable Gate Array (FPGA) Board: Quantity Needed: 6 Board form factor: The board must conform to the PCl Mezzanine Card (PMC), Switched Mezzanine Card (XMC), or FPGA Mezzanine Card (FMC) standards. User FPGA: Xilinx Virtex-5 FX130T, speed 1 device. Host hardware:The board must be capable of operating on their own independent, of a host computer.This includes operation of a hard core or soft core processor on the user FPGA without inputs from a host computer. Memory: 1 Gbyte SDRAM Flash memory: An onboard flash memory device must be provided for storing configuration data that can be loaded into the user FPGA to configure the board at power reset. The board must be capable of being configured by the user to allow writing to the flash through a user defined communication link from the user FPGA. If the standard communication link to the flash device is through a communications bus to the host board such as PCI, the board design must allow the user to reprogram the flash control interface for read/write access control from the user FPGA. User defined IO: The board must provide a minimum of 150 general purpose user I/O interfaces and a minimum of 8 GTX transceiver channels to off board connectors from the user FPGA. Thermal design: The board must be capable of conduction cooling for operation in a vacuum environment with an operating temperature to 85 degrees C. User Development tools: The vendor must provide user FPGA development references that include, at a minimum, Xilinx ISE compatible files describing any on-board FPGA pinouts in the form of constraint (UCF) files. Specifications for Zynq System on Chip (SOC) Board: Quantity Needed: 3 Board form factor: The board must conform to the PCl Mezzanine Card (PMC), Switched Mezzanine Card (XMC), or FPGA Mezzanine Card (FMC) standards. User FPGA: Xilinx Zynq Z-7045 Host hardware:The board must be capable of operating on their own, independent of a host computer.This includes operation of a hard core or soft core processor on the user FPGA without inputs from a host computer. Memory: 512 MByte (minimum) SDRAM interfaced to the Zynq processor, 512 MByte (minimum) SDRAM interfaced to the Zynq programmable logic. Flash memory: An onboard flash memory device must be provided for storing configuration data that can be loaded into the user FPGA to configure the board at power reset. The board must be capable of being configured by the user to allow writing to the flash with control from the Zynq processor. If the standard communication link to the flash device is through a communications bus to the host board such as PCI, the board design must allow the user to reprogram the flash control interface for read/write access control from the Zynq processor. User defined IO: The board must provide a minimum of 125 general purpose user I/O interfaces and a minimum of 8 GTX transceiver channels to off board connectors from the user FPGA. Thermal design: The board must be capable of conduction cooling for operation in a vacuum environment with an operating temperature to 85 degrees C. User Development tools: The vendor must provide user FPGA development references that include, at a minimum, Xilinx ISE compatible files describing any on-board FPGA pinouts in the form of constraint (UCF) files. The provisions and clauses in the RFQ are those in effect through FAC _2005_- 76. This procurement is a total small business set-aside. The NAICS Code and the small business size standard for this procurement are 334111 AND 1000 EMPLOYEES respectively. The offeror shall state in their offer their size status for this procurement. All responsible sources may submit an offer which shall be considered by the agency. Delivery to NASA Glenn Research Center, 21000 Brookpark Road, Cleveland, OH 44135 and is required within 12 weeks ARO. Delivery shall be FOB Destination. Offers for the items(s) described above are due by close of business, September 15, 2014 to Ingrid Pace ( Ingrid.Pace-1@nasa.gov ) and must include, solicitation number, FOB destination to this Center, proposed delivery schedule, discount/payment terms, warranty duration (if applicable), taxpayer identification number (TIN), identification of any special commercial terms, and be signed by an authorized company representative. Offerors are encouraged to use the Standard Form 1449, Solicitation/Contract/Order for Commercial Items form found at URL: http://server-mpo.arc.na sa.gov/Services/NEFS/NEFSHome.tml Offerors shall provide the information required by FAR 52.212-1 (JUL 2013), Instructions to Offerors-Commercial Items, which is incorporated by reference. If the end product(s) offered is other than domestic end product(s) as defined in the clause entitled "Buy American Act -- Supplies," the offeror shall so state and shall list the country of origin. FAR 52.212-4 (SEP 2013), Contract Terms and Conditions-Commercial Items is applicable. FAR 52.212-5 (SEP 2013), Contract Terms and Conditions Required To Implement Statutes or Executive Orders-Commercial Items is applicable. The FAR may be obtained via the Internet at URL: http://www.acquisition.gov/far/index.htm l The NFS may be obtained via the Internet at URL: http://www.hq.nasa.gov/o ffice/procurement/regs/nfstoc.htm All contractual and technical questions must be in writing (e-mail or fax) to Ingrid Pace not later than September 9, 2014. Telephone questions will NOT be accepted. Selection and award will be made to that offeror whose offer will be most advantageous to the Government, with consideration given to the factors of proposed technical merit, price, and past performance. It is critical that offerors provide adequate detail to allow evaluation of their offer. (SEE FAR 52.212-1(b)). Offerors must include completed copies of the provision at 52.212-3 (AUG 2013), Offeror Representations and Certifications - Commercial Items with their offer. The provision may be obtained via the internet at URL: http: //farsite.hill.af.mil/reghtml/regs/far2afmcfars/fardfars/far/52_000.htm. These representations and certifications will be incorporated by reference in any resultant contract. NASA Clause 1852.215-84 (NOV 2011), Ombudsman, is applicable. The Center Ombudsman for this acquisition can be found at http://prod.nais.nasa.gov/pub/p ub_library/Omb.html. Prospective offerors shall notify this office of their intent to submit an offer. It is the offeror's responsibility to monitor the following Internet site for the release of solicitation amendments (if any): http://prod.nais.nasa.gov/cgi- bin/nais/link_syp.cgi. Potential offerors will be responsible for downloading their own copy of this combination synopsis/solicitation and amendments (if any).
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