SPECIAL NOTICE
70 -- Notice of Intent to Award Sole Source
- Notice Date
- 5/17/2017
- Notice Type
- Special Notice
- NAICS
- 541512
— Computer Systems Design Services
- Contracting Office
- Department of Commerce, National Institute of Standards and Technology (NIST), NIST AMD Boulder, 325 Broadway, Boulder, Colorado, 80305, United States
- ZIP Code
- 80305
- Solicitation Number
- NB686070-17-03009
- Archive Date
- 6/6/2017
- Point of Contact
- Dennis M. Fuentes, Phone: 3034975573
- E-Mail Address
-
dennis.fuentes@nist.gov
(dennis.fuentes@nist.gov)
- Small Business Set-Aside
- N/A
- Description
- Notice of Intent: NB686070-17-03009 Status: Open Description of Contract Action: Optical Two-Way Time-Frequency Transfer (OTWTFT) digital signal support. Post Date: 05/17/2017 Close Date: 05/22/2017 File Name: NB686070-17-03009 / Optical Two-Way Time-Frequency Transfer (OTWTFT) digital signal support. Contact Points: Dennis Fuentes, Contracting Officer (303) 497.5573 This requirement is conducted under Federal Acquisition Regulation (FAR) 13.106-1(b). This is a notice of intent to negotiate on a sole source basis and is not a request for competitive proposals. Firms who want to challenge the sole source must submit an interest letter that demonstrates your firm's ability to provide an equivalent service as described below. Interested parties must provide rationale as to why they should be considered. All interested firms must respond to this special notice by 22 May 2017, 11:00am, Mountain Time to Dennis M. Fuentes at dennis.fuentes@nist.gov. Responses received will be assessed; however, a determination by the Government not to compete the proposed procurement based upon responses to this notice is solely within the discretion for the Government. Information received will normally be considered solely for the purpose of determining whether to conduct a competitive procurement. NIST will not reimburse for any costs connected with providing the capability information. Description: The National Institute of Standards and Technology (NIST), intends to negotiate and award on a sole-source basis under the authority of FAR 13.106-1 (b) with Consultation OctoSig Inc, in Canada. The Fiber Sources and Applications Group requires an embedded system for real-time digital signal processing to support Optical Two-Way Time-Frequency Transfer (OTWTFT). The current signal processing system is poorly documented and not implemented in a fashion suitable for further improvements, for extension to long distances, for extension to a full clock network, or to transfer to DoD customers for incorporation in systems. The objective of this SOW is to complete the set of tasks required to document and improve the current overall digital signal processing system for OTWTFT. The digital signal processing to support OTWTF is implemented across several platforms including field programmable gate arrays (FPGA), a digital signal processor (DSP), and personal computer (PC). Excluding testing software, the primary OTWTFT processing system includes 12,000 lines of C++ code in the DSP, 30,000 lines of VHDL/VERILOG code in the FPGA, and 12,000 lines of code in Python. A secondary control system is used for the free-space terminal tracking control. That system includes 1000 lines of Python code and 400 lines of VHDL/VERILOG. The tasks involve modifying the digital signal processing of the existing embedded system to improve the overall performance as specified. The NAICS code 541512 - Computer Systems Design Services, and the Small Business Size Standard is $27.5 will be used. 1. DELIVERABLES: This is a Performance Based Contract with the following Task 1: Legacy code from FPGA to DSP. Transfer legacy VHDL/VERILOG code from FPGA hardware to DSP. This legacy code was ported over to the current system from a first-generation FPGA OTWTFT signal processor. The legacy code to be transferred includes the following three subsystems: a) Kalman Filter to process the input timing signals over fades and output a filtered control signal b) Proportional-Integral-Derivative (PID) filter that takes the output of the Kalman filter and filters it through a PID to control the Direct Digital Synthesizer (DDS) for synchronization of either an optical or microwave clock. c) The upper-level code for the optical communication channel through transmission of binary-phase-shift keyed light. The high-speed portion of the communication firmware that requires a 200 MHz clock rate will remain on the FPGA but the remainder of the firmware will be transferred to operate on the DSP. In all three cases, the performance will be fully retained after the transfer from the FPGA to the DSP. All work will include modifications to the interface via the Python UI code. The modifications will include the ability to adjust input parameters for the three systems via the PC interface. (These input parameters are currently hard coded in the FPGA system). The contractor will participate in the testing of the modified firmware at NIST to verify operation. 2. Task 2: Documentation and Manual. Document existing digital signal processing for OTWTFT signal processor including the FPGA, DSP, and graphical user interface (GUI). The documentation will include a description of the basic algorithm and its implementation in the DSP or FPGA. The documentation will include all modifications made in Task 1. The GUI documentation will serve as a manual for the OTWTFT that is intended for an expert user. In other words, it is expected to be sufficient for a technical user to operate the OTWTFT after 8 hours of training. 3. Task 3: Testing and Technology Transfer Support. Support NIST effort to transfer OTWTFT capabilities to DoD customers. Contractor shall support NIST staff directly by providing the necessary documentation or technical support as needed for both hardware testing and technology transfer of the NIST OTWTFT system to the DoD or their contractors. This task will include minor modifications of the NIST signal processing system to operate with non-NIST optical hardware. It will include generation of additional detailed documentation beyond task 2, as requested by NIST to support the DoD. It will require up to 3 weeks of on-site support at the NIST Boulder campus and 1 week of off-site support. 4. Task 4: System modifications for Doppler-tolerant operation at 100 m/s. Modify Doppler-tolerant algorithm from operation up to 20 m/s to operation up to 100 m/s. These modifications include implementation of a) Modification of optical communication processing algorithms and implementation to maintain performance at up to 100 m/s b) Modification of initial triggering on input timing signals within the FPGA to allow for operation up to 100 m/s. c) Modification of the "range-ambiguity" search algorithm to maintain current timing precision up to 100 m/s velocity. 5. Task 5: Upgraded firmware for free-space optical terminals. Upgrade firmware for current free-space optical terminal to maintain a free-space link to a retroreflector moving at up to 20 m/s transverse velocity through a combination of input data from the existing beacon detector and imaging. The performance should allow tracking of a retro at up to 20 m/s transverse motion at the limit imposed by the physical gimbal (whose specifications will be provided to the contractor). All the development of the OTWTFT signal processing system will take place on the existing real-time digital signal processor, depicted in Figure 1. The general software specifications for the tasks 1,3,4 and 5 above includes: • All code must be covered with unit tests to at least 95% to verify functionality and to guard against regressions from future refactoring, extension, and/or bug fixes. • All code must be supplemented by software test benches that enable simulation and unit testing without the need for hardware. Testing code may be written in Matlab or Python. • The code must be tested on a digital real-time signal processor provided as GFE to the contractor. • All code must be documented by appropriate comments and naming conventions (in addition to task 2 above.) • Proprietary or closed-source software, including FPGA IP cores, must not be used unless the contractor has previously verified NIST already owns such IP cores. • All project software being developed must be maintained in a suitable repository (e.g. GitHub) to allow government to monitor development progress and provide rapid feedback when changes are needed. • Code must be organized to be reviewed by the government on a regular basis, as specified in the deliverable table below. The results of the reviews are to be integrated in successive development steps. Figure 1: Existing real time digital signal processor hardware. I. PERIOD OF PERFORMANCE The period of performance shall be from 7/1/2017 through 12/31/2017.
- Web Link
-
FBO.gov Permalink
(https://www.fbo.gov/notices/f3581c871e824c0ac7dc6731c2145414)
- Place of Performance
- Address: NIST, 325 Broadway, Bourders, Colorado, 80503, United States
- Zip Code: 80503
- Zip Code: 80503
- Record
- SN04512224-W 20170519/170517235403-f3581c871e824c0ac7dc6731c2145414 (fbodaily.com)
- Source
-
FedBizOpps Link to This Notice
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