SOLICITATION NOTICE
A -- Page 3 Architectures - Attachment
- Notice Date
- 9/13/2017
- Notice Type
- Presolicitation
- NAICS
- 541712
— Research and Development in the Physical, Engineering, and Life Sciences (except Biotechnology)
- Contracting Office
- 675 North Randolph Street Arlington, VA 22203
- ZIP Code
- 22203
- Solicitation Number
- HR001117S0055
- Response Due
- 12/4/2017
- Archive Date
- 7/3/2018
- Point of Contact
- BAA Coordinator
- E-Mail Address
-
HR001117S0055@darpa.mil
(HR001117S0055@darpa.mil)
- Small Business Set-Aside
- N/A
- Description
- DARPA is soliciting innovative research proposals in the area of novel computing architectures. The Page 3: Architectures thrust of the Electronics Resurgence Initiative (ERI) seeks to demonstrate heterogeneous computing systems that provide the performance advantages of specialized processors, while maintaining the programmability of general purpose processors. The goal of the Software Defined Hardware (SDH) program is to build runtime-reconfigurable hardware and software that enables near ASIC performance without sacrificing programmability for data-intensive algorithms. SDH will create a hardware/software system that allows data-intensive algorithms to run at near ASIC efficiency without the cost, development time or single application limitations associated with ASIC development. The overall goal of the Domain-specific System on Chip (DSSoC) program is to develop a heterogeneous SoC comprised of many cores that mix general-purpose processors, special-purpose processors, hardware accelerators, memory, and input/output (I/O). DSSoC seeks to enable rapid development of multi-application systems through a single programmable device.
- Web Link
-
FBO.gov Permalink
(https://www.fbo.gov/spg/ODA/DARPA/CMO/HR001117S0055/listing.html)
- Record
- SN04675874-W 20170915/170913232350-0cba104a34e76587141838a0d09c9878 (fbodaily.com)
- Source
-
FedBizOpps Link to This Notice
(may not be valid after Archive Date)
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