SPECIAL NOTICE
99 -- TECHNOLOGY/BUSINESS OPPORTUNITY 3D Silicon Structures Fabricated via Greyscale DRIE
- Notice Date
- 3/31/2023 10:44:24 AM
- Notice Type
- Special Notice
- NAICS
- 334413
— Semiconductor and Related Device Manufacturing
- Contracting Office
- LLNS � DOE CONTRACTOR Livermore CA 94551 USA
- ZIP Code
- 94551
- Solicitation Number
- IL-13676
- Response Due
- 3/31/2023 12:00:00 PM
- Archive Date
- 05/01/2023
- Point of Contact
- Genaro Mempin, Phone: 9254231121, Charlotte Eng, Phone: 9254221905
- E-Mail Address
-
mempin1@llnl.gov, eng23@llnl.gov
(mempin1@llnl.gov, eng23@llnl.gov)
- Description
- Opportunity: Lawrence Livermore National Laboratory (LLNL), operated by the Lawrence Livermore National Security (LLNS), LLC under contract no. DE-AC52-07NA27344 (Contract 44) with the U.S. Department of Energy (DOE), is offering the opportunity to enter into a collaboration to further develop its 3-step process for the production of complex 3D silicon micro-objects. Background: Ongoing miniaturization, the manufacturing of ever-smaller products and devices, has led LLNL researchers to explore the many ways to microfabricate objects with features in the micron scale in larger quantities.� Common microfabrication processes, particularly for complex geometries have a number of drawbacks.� Depending on the process, the limitations range from not achieving the desired shape, being slow/have low throughput to requiring multiple steps and higher-level expertise.� There is a need for a more reliable and efficient method to produce complex 3D silicon micro-objects of customizable shape in less steps than what is currently available. LLNL�s novel method of producing silicon microstructures was spurred by research to fabricate neural implant stiffeners that are to be used for chronic implantation of electrode arrays in the brain for monitoring its activity.� The fabrication of these devices are time-consuming due to the complexity of the 3D shanks, which are designed to reduce insertion force.� LLNL researchers have developed a simple three step process comprised of commonly available fabrication procedures to allow for a faster microfabrication process for such stiffeners as well as other similar objects. Description: For this method, a Silicon on Insulator (SOI) wafer is used to tailor etch rates and thickness in initial steps of the process.� The simple three step process approach is comprised of grayscale lithography, deep reactive-ion etch (DRIE) and liftoff of the SOI wafer.� The liftoff process is used to dissolve the insulating layer, thus separating sections of the wafer as individual silicon objects.� This approach allows for production of these objects to be performed in far fewer steps than it would otherwise take if attempted by other more common means. Advantages/Benefits:� Much greater efficient process with fewer steps resulting in reduced cost and time savings Higher throughput (wafer-scale) Applicable to any need for solid silicon microstructures Potential Applications:� Fabrication of 3D silicon microstructures for objects such as: Surgical shuttles for use with implantable devices (e.g. neural implant stiffeners) MEMS components Silicon lenses (e.g. Fresnel lenses) Development Status:� U.S. Patent Application Publication No. 2023/0025444 SYSTEMS AND METHODS FOR SILICON MICROSTRUCTURES FABRICATED VIA GREYSCALE DRIE WITH SOI RELEASE published 1/26/2023 Current stage of technology development:� TRL 2 (Technology concept and/or application formulated) LLNL is seeking industry partners with a demonstrated ability to bring such inventions to the market. Moving critical technology beyond the Laboratory to the commercial world helps our licensees gain a competitive edge in the marketplace. All licensing activities are conducted under policies relating to the strict nondisclosure of company proprietary information.� Please visit the IPO website at https://ipo.llnl.gov/resources for more information on working with LLNL and the industrial partnering and technology transfer process. Note:� THIS IS NOT A PROCUREMENT.� Companies interested in commercializing LLNL's 3-step process for the production of complex 3D silicon micro-objects should provide a written statement of interest, which includes the following: 1.�������� Company Name and address. 2.�������� The name, address, and telephone number of a point of contact. 3.� � � � �A description of corporate expertise and/or facilities relevant to commercializing this technology. Written responses should be directed to: Lawrence Livermore National Laboratory Innovation and Partnerships Office P.O. Box 808, L-779 Livermore, CA� 94551-0808 Attention:�� IL-13676 Please provide your written statement within thirty (30) days from the date this announcement is published to ensure consideration of your interest in LLNL's 3-step process for the production of complex 3D silicon micro-objects.
- Web Link
-
SAM.gov Permalink
(https://sam.gov/opp/db95c98afbab42c0a0ca683fabcd960c/view)
- Place of Performance
- Address: Livermore, CA, USA
- Country: USA
- Country: USA
- Record
- SN06636554-F 20230402/230331230107 (samdaily.us)
- Source
-
SAM.gov Link to This Notice
(may not be valid after Archive Date)
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