Naval Undersea Warfare Center Division, Newport Commercial Acquisition Department, Code 09, Building 11, Newport, RI 02841-5407

70 -- SIGNAL PROCESSING BOARDS SOL N66604-95-R-E983 DUE 091595 POC Contact Jacqueline Feirouz, Contracting Officer at (401) 841- 2442 X294, FAX: (401) 841-4820 The Naval Undersea Warfare Center Division, Newport, RI anticipates a 100% small business set-aside, firm fixed priced supply contract for the acquisition of the following items: Octal Digital Signal Processing Boards consisting of 0001AA: VME motherboard, spectrum P/N CV4-600-01590 or equal, 4 each. VME motherboard shall be implemented on a single slot, 6U VME card. Must be configured with eight Texas Instruments TMS32040 50 Mhz digital signal processors (DSP). - The VME board shall provide interrupt synchronization between processors. -The motherboard must have a minimum of two communication ports per pair C40 processor routed to the front panel. - Each motherboard shall be equipped with 32K X 8 bit EEPROM to provide a program and boot capability and module - ID. -The motherboad will allow external synchronization with a pulse TTL waveform with a minimum pulse width of 1 microsecond. -Each processor shall be equipped with a minimum of 64K X 32 bit 0 wait-state static random access memory. The motherboard must provide a JTAG scanpath to the front panel. The motherboard must be capable of being reset from the front panel without resetting the VME bus backplane. 0001AB Dual TMS 320C40 TIM module, spectrum model MCD40T2, P/N 600-02144, or equal, 16 each. Characteristics/configuration: The following analog and digital input/output capabilities must be implemented on the motherboard or an attached daughter board such that the single width VME requirement stated above is maintained. - Each pair of TMS320C40 processors must be provided a minimum 14 bit, 250 kHz analog to digital converter (ADC) and 12 bit, 100 kHZ digital to analog converter (DAC). - The ADC must maintain 80 dB of dynamic range through the digital signal processors. - The ADC oscillator must have a selectable source from either (A) C40 timer or onboard programmable oscillator or (B) external oscillator (P2 connector). Both the ADC and DAC must have a dedicated path to the pair of digital signal processors. They shall not be routed through a data bus or communications port which is common to outside memory or the VME bus. 0002 development software and emulation support via a SUN SPARC controller based on the TI DB40 debugger, 1 lot. FOB destination at NUWC Division Newport, RI. Delivery required 45 days after award of contract. SIC code 3577, 1000 employees. (0207)

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