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COMMERCE BUSINESS DAILY ISSUE OF MAY 6,1997 PSA#1839NASA/Goddard Space Flight Center, Code 217, Greenbelt, MD 20771 36 -- SPACE FLIGHT QUALIFIED DRAM MEMORY STACKS SOL RFO5-092941-241
DUE 051697 POC Judith Jones, Contract Specialist, Phone (301)286-4242,
Fax (301)286-1720, Email Judith.M.Jones.1@gsfc.nasa.gov WEB: Click
here for the latest information about this notice,
http://procurement.nasa.gov/EPS/GSFC/date.html#RFO5-092941-241. E-MAIL:
Judith Jones, Judith.M.Jones.1@gsfc.nasa.gov. NASA/GSFC plans to issue
a Request for Offer (RFO) for the acquisition of 60 screened and
functionally tested space qualified, package-less, DRAM memory stacks
(.512 Mbits), Part No. AS7D16M32BGA and its supporting documentation
that includes but is not limited to, structural, mechanical,
electrical, functional, timing, and test data for as built as tested
units. This procurement is being conducted under the NASA MidRange
Pilot Test Program approved by the Office of Federal Procurement
Policy. NASA/GSFC intends to purchase the items from Austin
Semiconductor, Inc. of Austin, Texas, on a sole source basis, as they
are the initial source for the supplies to be purchased. As a follow on
effort, Austin Semiconductor is the only known source capable of
providing the specific space flight qualified items which will meet
these mandatory requirements. The statutory authority permitting Other
Than Full and Open Competition is 10 U.S.C. 2304(c)(1), Only One
Responsible Source. The specification requirements are as follows: (1)
Assemblies of TI 16Mbit, fast page mode, 5V, 4K refresh die, part
number TMS416400, (2) The assembly must incorporate wafer scale
segments as functional memory building blocks. These memory segments
shall be assembled in such a way so as not to be considered packaged or
enclosed in platic (PEM), (3) The stack assembly base shall be a
ceramic, 50 mil. pitch, chip scale BGA (ball grid array). This same
ceramic base must be able to be used with a 2 Gbit stack assembly
upgrade. (4) The contractor shall have established procurement
relations with Samsung and TI for wafer lot procurement. Samsung 64
Mbit DRAM die (5V, FPM, 4K refresh) will be required for near term
density upgrade and acceptable timing upgrades to existing boards built
under the EO-1 program. The Contractor shall also provide written
mechaical/electrical/timing specifications for the flight qualified
DRAM memory stacks. Interested firms have 15 days from the date of this
publication on the NAIS to submit their qualifications/capabilities to
the Contract Specialist identified above. Sources must provide
detailed technical information and other technical literature
sufficiently documented to demonstrate their ability to meet all of the
above specifications in order to permit this Agency to analyze their
information and to determine the firm's bonafide capability of meeting
this requirement. Such qualifications/capabilities will be used solely
for the purpose of determining whether or not to conduct this
procurement on a competitive basis. Responses received after 15 days
without the required information will be considered nonresponsive to
the synopsis and will not be considered. A determination by the
Government not to compete this proposed contract, on a full and open
competitive basis, based upon responses to this notice, is solely
within the discretion of the Government. No solicitation document is
available and a request for a solicitation shall not be considered an
affirmative response to this announcement. Telephone responses shall
not be accepted, however, you may facsimile information to (301)
286-1720 to the attention of the contract specialist. All responsible
sources may submit an offer which shall be considered by the agency.
Any referenced numbered notes can be viewed at the following URL:
http://genesis.gsfc.nasa.gov/nnotes.htm. (0122) Loren Data Corp. http://www.ld.com (SYN# 0160 19970506\36-0002.SOL)
36 - Special Industry Machinery Index Page
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