HIGH TEMPERATURE PROCESSING OF SILICON WAFERS FOR MANUFACTURING he U. S. department of Energy (DOE), its laboratories and production facilities are committed to helping businesses in the United States to improve the cycle from new ideas and product innovation to product development and commercialization. In order to achieve this goal, the DOE has put in place a program to transfer technologies developed at its laboratories to the private sector for commercial applications. DOE's objective in doing this is to establish mutually beneficial partnerships that can leverage advanced technologies and enhance the U.S. position in the ever changing global marketplace. Sandia National Laboratories (Sandia) is one of the participating laboratories in this program. By this announcement, Sandia is soliciting expressions of interest from U.S. businesses for potential licensing of the following technology for which patent application has been filed with the U.S. Patent Office. HIGH TEMPERATURE PROCESSING OF SILICON WAFERS FOR MANUFACTURING High Temperature processing of silicon wafers is essential to manufacturing modern microelectronic devices. Implant anneals, oxidation, diffusion drive-in and chemical vapor deposition (CVD) are all performed at temperatures ranging from 600 to 1200 C. These four distinct processes are currently performed either in multi-wafer batch furnaces or in single-wafer processors. Both of these tools suffer from several serious shortcomings. The current common alternative to batch furnace processing is the rapid thermal processor (RTP). RTP does not suffer the problems of radial energy and species transport inherent to the batch furnace. They potentially reduce process times an order-of-magnitude or more, while maintaining a wafer throughput comparable to that of a batch furnace. Even though RTPs appear to offer several advantages over the traditional batch furnace, most of these benefits have not been realized due to practical problem in measurement and control of wafer temperatures. Sandia National Laboratories has developed a process for processing semiconductor wafers subjected to very high temperatures and has filed a patent application on it with the U.S. PTO. This process combines the temperature stability and uniformity of a hot-walled batch furnace with the processing speed of RTP. It is best suited to anneal, drive-in and oxidation processes. However, with appropriate coolant reactant injectors, the process could be easily adapted to a broad range of CVD applications. Its advantages over a conventional RTP are simplicity of temperature measurement and control, ensured uniformity of wafer temperature, greatly reduced peak and mean power requirements, reduced costs for power supply and control hardware. It's advantages over traditional batch furnace are those of all RTPs: greatly reduced cycle time and reduced time-at-temperature. These factors are very important not only in the processing of 200 mm wafers that are currently used but also in the processing of 300 mm wafers which are currently being introduced in the industry. If you are interested in this technology, please send a written expression of interest to Joanna Trujillo, MS 1380, Sandia National Laboratories, P. O. Box 5800, Albuquerque, NM 87185 (FAX: 505-843-4175). This should include details about the company and its product line, potential fields of use of interest for the invention and any other information of interest. E-MAIL: Joanne Trujillo, jmtruji@sandia.gov. Posted 01/28/99 (W-SN292417).

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